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Remote-Junction Temperature-Controlled
Fan-Speed Regulator with SMBus Interface
to 16s and stores the data in an update register
(UPDATE). This enables control over timing of the ther-
mal feedback loop to optimize stability.
The Fan Threshold (T FAN ) register value is subtracted
from the UPDATE register value. If UPDATE exceeds
T FAN temperature, then the Fan-Speed Control (FSC)
register (Table 9) stores the excess temperature in the
form of a 7-bit word with an LSB of 0.5°C for bits 4–0,
with bit 5 = 16°C. If the difference between the T FAN
and UPDATE registers is higher than 32°C, then bit 6 is
set to 1, along with bits 5–1. In thermal closed loop, the
Fan Speed Control register is READ ONLY.
The Fan Gain (FG) register (Table 10) determines the
number of bits used in the Fan-Speed Control register.
This gain can be set to 4, 5, or 6. If bits 6 and 5 are set
to 10, all 6 bits of TEMPDATA are used directly to pro-
gram the speed of the fan so that the thermal loop has
a control range of +32°C with 64 temperature steps
Table 8. Fan Conversion Update Rate
from fan off to full fan speed. If bits 6 and 5 are set to
01, the thermal control loop has a control range of 16°C
with 32 temperature steps from fan off to full fan speed.
If bits 6 and 5 are set to 00, the thermal control loop
has a control range of 8°C with 16 temperature steps
from fan off to full fan speed.
Thermal Open Loop
Setting bit 3 of the Configuration register (Table 5) to 1
places the MAX6660 in thermal open loop. In thermal
open-loop mode, the FSC register is read/write and con-
tains the 7-bit result of UPDATE subtracted from T FAN .
In fan open loop, the FSC register programs fan voltage
with acceptable values from 0 to 64 (40h). For example,
in fan open-loop mode, 0 corresponds to zero output
and 40h corresponds to full fan voltage, for example
(11.3V, typ). Proportional control is available over the 0
to 63 (3Fh) range with 64 (40h) forcing unconditional
full speed. In fan closed-loop mode, 0 corresponds to
zero fan speed and 10h corresponds to 100% fan
speed, when the FG register is set to 4 bits, 20h at 5
FAN
SECONDS
bits, and 3Fh at 6 bits.
DATA
00h
01h
02h
03h
04h
05h
06h
BINARY
00000000
00000001
00000010
00000011
00000100
00000101
00000110
UPDATE
RATE (Hz)
0.0625
0.125
0.25
0.5
1
2
4
BETWEEN
UPDATES
16
8
4 (POR)
2
1
0.5
0.25
Fan Loop
The fan controller (Figure 7) is based on an up/down
counter where there is a reference clock representing
the desired fan speed counting up, while tachometer
pulses count down. The reference clock frequency is
divided down from the MAX6660 internal clock to a fre-
quency of 8415Hz. This clock frequency is further
divided by the Fan Full-Scale (FS) register (Table 11),
which is limited to values between 127 to 255, for a
Table 9. Fan-Speed Control Register (RFSC/W FSC)
REGISTER/
ADDRESS
COMMAND
FSC (15h = READ, 1Ah = WRITE)
READ/WRITE FAN DAC REGISTER
Bit
POR State
7
N/A
0
6
Overflow Bit
0
5
(MSB)
0
4
Data
0
3
Data
0
2
Data
0
1
Data
0
0
Data
0
Note: In thermal closed-loop mode, the fan DAC is read only and contains the difference between the measured temperature and
the fan threshold temperature. The LSB is 0.5°C and bit 5 is 16°C. If the difference is higher than 32°C, then bit 6 is set to 1,
together with bits 5–0. Bit 6 can be regarded as an overflow bit for differences higher than 32°C. Bit 7 is always zero. The FSC
register can be programmed directly in thermal open mode. In fan closed-loop mode, FSC programs fan speed with accept-
able values from 0 to 10h, when FG is set to 4 bits or 20h when FG is set to 5 bits, or 3F when FG is set to 6 bits. In fan open-
loop mode, FSC programs fan voltage with acceptable values from 0 to 64 (40h). For example, in fan closed-loop mode, zero
corresponds to zero fan speed and 10h corresponds to 100% fan speed. In fan open-loop mode, zero corresponds to zero
volts out and 40h corresponds to full fan voltage (11.3V typ).
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